We report a comprehensive etching study on gate recess processing step in Novel pseudomorphic High Electron Mobility Transistor (pHEMT) fabrication step. The conducted experiments focused on the etchant composition and elimination of the Cap layer residue (Dome Effect) at the etching trenches. The optimized processing flow using highly selective Succinic Acid is aimed for moderate Cap layer, with etching rate of 240 Å/min and InGaAs-InAlAs selectivity of 140 respectively. The percentage of the Dome height to etching depth is consistent to 30% throughout the etching surface, which can be further improved by controlling the etching time to the etch stop layer. The optimized processing steps will enhanced the device’s robustness especially in the complete processing steps for Monolithic Microwave Integrated Circuit (MMIC) fabrication, tailored for high-gain and low noise applications in satellite communication.